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PA-RISC Chipsets

Astro overview

Some PA-8500, PA-8600 and PA-8700 systems use a rope-based architecture with Astro as main system controller and separate Runway+/Runway DDR buses with I/O devices controlled by Elroy PCI bridges.

The PA-8500, PA-8600, PA-8700 processors use an advanced version of the Runway system bus with increased data rate and utilized different I/O and memory controllers, with most using the Astro chipset (IOMMU) and few servers the sophisticated Stretch and Cell chipsets.

System bus design

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Astro

Newer workstations and servers, based on PA-8500, PA8600 and 8700 processors, use the Astro chip for memory and I/O management (IOMMU). Pluto is the successor of Astro for Itanium-2 processors and buses; it works very similar. Astro attaches to three different buses and is the central part of the chipset.

Bus attachments

Memory

Other features

Used in

References

  1. Astro External Reference Specification Introduction
    Astro External Reference Specification Error Handling
    Astro External Reference Specification R2I Operations
    Astro External Reference Specification Register Map
    Astro External Reference Specification Runway Interface
    Astro External Reference Specification Memory Map
    Hewlett-Packard Company (February 2000, Revision 1.2)

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Elroy

Elroy is a PCI bus bridge that attaches one PCI bus to one or more I/O ropes. Common configurations are one 250 MB/s I/O rope for one Turbo PCI bus (can have multiple slots or attach multiple I/O devices) or two I/O links (about 500 MB/s) for one Twin Turbo bus.

Elroy was often used with the Astro memory and I/O controller.

Bus attachments

Other features

Used in

References

  1. Elroy ERS (External Reference Specification) — Ropes to PCI Bridge Chip Hewlett-Packard Company (January 2000, Revision A (1.4))

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