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PA-RISC Chipsets

Stretch overview

Other 64-bit midrange servers based on the same processors (PA-8500 to 8700) are based on the Stretch chipset, a rather complicated setup with central system controller and links to separate processor and I/O controllers and PCI bridges. Main system bus is the Itanium bus, with converters for the processors’ Runway+/Runway DDR buses.

Stretch is the chipset used in a small range of systems, based on 64-bit PA-RISC processors but with Itanium (Merced) main buses. It consists of four main components that are improved previous designs.

System bus design

» For illustration view a system-level description of the N4000 server (Stretch-based).

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Prelude

Prelude is the memory controller of systems with the Stretch chipset and connects the main memory via four memory buses to two system buses. The main buses are in fact Itanium/Merced buses in preparation of the HP shift from PA-RISC to Itanium. Systems with Stretch theoretically could have been upgraded to Itanium processors, which however never realized.

Bus attachments

Memory

Other features

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References

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DEW

DEW is the Runway CPU bridge for systems based on the Stretch chipset. It attaches the Runway-based PA-8500, PA-8600 and PA-8700 CPUs to the Itanum-based system man buses. Each pair of two CPUs share one DEW port converter. Common configurations include one to four DEWs for up to eight processors.

Bus attachments

Other features

Used in

References

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IKE

IKE is the I/O controller on systems with the Stretch chipset. The central memory controller provides one or two system buses, to which CPUs and I/O attach. Each system bus has one IKE I/O controller that connects to several slave I/O controllers (Elroy PCI bridges), which in turn provide PCI buses. The connection between IKE and each slave I/O controller is one or two 12-byte wide I/O links (I/O ropes). I/O channels can be combined into twin I/O channels for so-called Twin-Turbo PCI slots/buses.

Bus attachments

Used in

References

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