HP N4000 (rp7405/rp7410)
|Caches||2.25-3 MB L1
0-64 MB L2
|Bandwidth||CPU 8-16 GB/s
XBAR 8 GB/s
Mem 4-8 GB/s
XBAR-I/O 4 GB/s
I/O 8.4 GB/s
The rp7405/rp7410 N4000 servers are up to 8-way multiprocessing servers and the smallest HP systems which
can be partitioned into logical servers (two nPartitions).
Based upon the same 10U rack-mountable chassis as their rp7400/N4000 brethren, the newer rp7405 and
rp7410 are built around a completely overhauled system and I/O architecture.
Core Electronic Complex is a modified version of the Superdome’s cell-based
system architecture, limited to two cells, which each contain up to four processors, sixteen
memory slots and the central chipset — the cell controller (CC).
These newer N4000s feature a very large amount of system and I/O bandwidth: 16 GB/s CPU,
8 GB/s memory, 8 GB/s cell-to-cell and 8.5 GB/s I/O bandwidth (all maximum aggregate values).
The rp7405 was apparently an entry-level version of the rp7410 — based on the same hardware
and with the same capabilities but shipped in smaller configurations. Upgrades to a
were later possible, probably including a modified firmware for unlocking the full functionality.
The rp7405 and rp7410 support from two to eight processors.
They are based on different system boards with different model numbers — the same basic architecture but with differences relating to the type and number of processors.
- A6752A (rp7410) supports 650 MHz, 750 MHz and 875 MHz processors
- A7111A (two-way rp7405) supports 650 MHz and 750 MHz processors
- A7112A (four-way rp7405) supports 650 MHz and 750 MHz processors
- A7113A (eight-way rp7405) supports 650 MHz and 750 MHz processors
Processor types are indicated with the following suffixes:
- -6X: PA-8700 650 MHz with 768/1536 KB on-chip I/D L1 cache each
- -7X: PA-8700 750 MHz with 768/1536 KB on-chip I/D L1 cache each
- -8X: PA-8700+ 875 MHz with 768/1536 KB on-chip I/D L1 cache each
- -9X: PA-8800 (dual-core) 900 MHz/1.0 GHz with 1.5/1.5 MB on-chip L1 and 32 MB off-chip L2 cache each
- PA-8900 (dual-core) 800 MHz-1.1 GHz with 1.5/1.5 MB on-chip L1 and 64 MB off-chip L2 is probably also possible (suffix and affected models unknown)
- Itanium 2/IA64 processors are probably also possible on some models
- It is unclear which models support the -8X, -9X, PA-8900 and IA64 processors
There are two CPU/memory cell boards, with each four processor sockets.
The Cell system architecture has three main components:
- Cell controller (CC): the central chipset and crossbar. One sits at the centre of each cell board for a maximum of two in a complete system. The CCs provide links for four processors, two memory banks, I/O via SBA, PDH and firmware, and second cell via the XBC.
- Master I/O controller (SBA): the central I/O part of the main chipset with two SBAs, located on the I/O backplane.
Each is linked to one cell — with one cell board only one SBA and its I/O
options can be used. Each SBA provides links (32 in all) that connect to slave I/O controllers LBA.
- 28 ropes link to 14
Twin-Turboslots (via 14 LBAs)
- Two ropes link to two
Turbo(that is, normal) PCI slots (via two LBAs), from which one is reserved for the PCI Core I/O LAN/SCSI card
- Two links/ropes (one from each SBA) are connected via two LBAs to the Core I/O MP/SCSI card(s)
- 28 ropes link to 14
- Core I/O: provides the standard I/O functions for the system with a set of cards (MP/SCSI and LAN/SCSI).
One or two sets are possible in each N4000.
- Two dual-channel Symbios Logic 53C1010 Ultra160 SCSI controllers (on MP/SCSI and LAN/SCSI)
- Dual-channel Symbios Logic 53C896 Ultra2-Wide SCSI-3 controller (MP/SCSI)
- Gigabit Ethernet networking (LAN/SCSI)
- Diva Serial [GSP] Multiport UART for console (MP/SCSI), serial and management controllers (MP/SCSI)
- Fast-Ethernet (DEC 21142/43) Management LAN (MP/SCSI)
- The optional second Core I/O card set can be used either for redundancy or partitioning purposes (I/O for the second partition)
Other parts of the chipset:
- 18 Elroy PCI bridges (LBAs) convert the links/ropes from the SBA into PCI bus (only 9 of these 18 LBAs are used when only one cell board is installed)
- Runway+/Runway DDR CPU bus (CPU to cell controller), 125 MHz DDR, 64-bit wide, 2.0 GB/s per CPU — aggregate 8.0 GB/s for each cell (four CPUs/cell) and 16.0 GB/s for maximum system
- Memory bus (memory to cell controller) 4.0 GB/s for each cell — aggregate 8.0 GB/s for maximum system
- XBC cell-to-cell link (cell controller to cell controller) 8.0 GB/s aggregate
- SBA cell-to-I/O link (cell controller to I/O backplane) 2.0 GB/s on each cell — aggregate 4.0 GB/s for maximum system
- 32 I/O links/ropes, 12-bit wide, 265 MB/s (16 links/ropes on each cell) — 8.5 GB/s I/O aggregate peak bandwidth
- 14 PCI-64/66 I/O buses for expansion slots
- Two PCI-64/33 I/O buses for expansion slots (for Core I/O SCSI/LAN)
- Two PCI-64/33 I/O buses for Core I/O (MP/SCSI)
- Two SCSI-3 Ultra160 LVD main storage I/O buses (one on each cell)
- Ultra SCSI SE for removable media (DVD/Tape)
- ECC DIMMs, low-voltage TTL interface, 125 MHz frequency (traditional/PC-133 SDRAMs do not work)
- 256 MB, 512 MB and 1 GB modules supported (2 GB probably later too)
- 16 slots on each cell board (32 slots maximum in a full system configuration), installed in quads
- 32 GB maximum (in a full system configuration with two cells)
- 64 GB was given as maximum with
futurememory modules — probably working today
There are in all 16 PCI 64-bit/66 MHz slots in the I/O cage, which can be fully accessed when using a system with two cells — with one cell board only seven slots are available. One PCI slot is dedicated to the Core I/O card set (see above) so only 15 of the 16 PCI slots are available for expansion options.
Twin-TurboPCI 64-bit/66 MHz slots, each on an independent PCI bus, each connected via two I/O links/ropes (aggregate 530 MB/s), hot-plug capable
TurboPCI 64-bit/66 MHz slots, each on an independent PCI bus, each connected via one I/O link/rope (265 MB/s), hot-plug capable (one of these two Turbo slots is reserved for Core I/O LAN/SCSI)
- Twelve slots keyed for 3.3 V (support either 3.3 V or universal PCI cards)
- Four slots keyed for 5.0 V (support either 5.0 V or universal PCI cards)
- Four trays for low-profile 3.5″ Ultra2-Wide LVD SCSI hard drives with 80-pin SCA connector, hot-plug (two Core I/O card sets are needed to access all four drives)
- One tray for a half-heigth 5.25″ 50-pin Ultra-Narrow SE SCSI drive, external accessible
The two pairs of SCSI drives are each connected to a separate channel on one of the SCSI controllers of the Core I/O sets — for both pair of drives to work two Core I/O card sets are needed.
- 68-pin VHDCI Ultra160 LVD external SCSI (external channel from LAN/SCSI board)
- Three DB9 male RS232C serial (local console, remote console, UPS) via a
M cable(MP/SCSI board)
- 10/100 Mbit Ethernet TP/RJ45 Management LAN (MP/SCSI board)
- Gigabit Ethernet TP/RJ45 (LAN/SCSI board)
- User Guide hp rp7405/7410 Servers (URL gone)
- hp server rp7410 whitepaper (URL gone)
|Model||SPEC2000, int||SPEC2000, fp||SPEC2000
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- Rack-mounted: 10U height
- Up to two hot-swappable/redundant power supplies (one is standard)