HP Integrity rx4610

Quick Facts
Introduced 2001
CPU 2-4 Itanium
733-800 MHz
Caches 32 KB L1
96 KB L2
2.0-4.0 MB L3
Design zx1
Drives 2 SCSI
1 FD
Expansion 8 PCI 64/66
2 PCI 64/33
Bandwidth CPU 2.1 GB/s
Mem 4.2 GB/s
I/O 2.1 GB/s
I/O 10/100E
2 serial
2 PS/2


The Integrity rx4610 were HP’s first-generation Itanium server based on up to four Merced Itanium processors and integrated into an 7U rack-mountable case. The rx4610 offered many I/O and expansion options with ten PCI slots on four PCI buses (attached to 2.1 GB/s of I/O bandwidth) and up to 64 GB of main memory but was limited to only two internal SCSI drives.

The rx4610 is based on the Intel Itanium reference architecture — the 82460GX chipset, which looks like a mix of PC-style (Frontside Bus to the processor) and PA-RISC (I/O ropes from the central chipset to PCI converters) platforms. The other HP system with Merced processors and the 82460GX was the HP i2000 workstation. Both the i2000 and rx4610 were rather slow and buggy when compared to contemporary PA-RISC systems.



No. CPU Type Clock L1 (I/D) L2 (I/D) L3
2-4 Itanium 1 Merced 733 MHz 16/16 KB 96 KB 2.0 MB
2-4 Itanium 1 Merced 800 MHz 16/16 KB 96 KB 4.0 MB

L1 and L2 caches are on-die, L3 is off-chip


The rx4610 is based on Intel’s 82460GX chipset with four main components:

  1. 82460GX SAC (System Address Chip) is the central chipset part:
    • System bus (FSB) for up to four processors — 2.1 GB/s (the SAC connects to the address and control parts of the FSB)
    • Four I/O channels to which the PCI buses attach (via the WXBs/PXB) — each channel is 533 MB/s
    • Connection to the SDC
    • Address/control access to the main memory
  2. Three 82460GX WXBs (Wide eXpansion Bridges) which connect the PCI 64/66 buses via three I/O channels to the SAC
    • One I/O channel connects to two PCI 64/66 slots
    • One I/O channel connects to three PCI 64/66 slots
    • One I/O channel connects to three PCI 64/66 slots and the SCSI controller
  3. 82460GX PXB (PCI eXpansion Bridge) connects the PCI 64/33 bus and core I/O (Ethernet LAN, PS/2, parallel, serial, IDE, USB, VGA) and the baseboard management controller via one I/O channel to the SAC
  4. 82460GX SDC (System Data Chip) is the central memory data controller:
    • It connects to the data part of the FSB system main bus
    • Has a private link to the SAC (PD)
    • Connects to the memory subsystem (data transfers, in contrast to the SAC’s Address/control access)

The rest of the chipset is made up of standard (third-party) I/O components:





External connectors



Operating systems


Model SPEC2000, int SPEC2000, fp SPEC2000
rate, int
rate, fp
733 MHz 2 MB
625 7.2
2-CPU: 12.7
4-CPU: 20.1
800 MHz 4 MB
379 701 4.4 8.1
2-CPU: 14.2
4-CPU: 22.4

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Physical dimensions/Power

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