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PA-RISC Processors

Overview

The PA-RISC platform is based on RISC processors from HP and was used in HP computers from the 1980s to the mid-2000s. Three major revisions of the PA-RISC architecture were developed:

  1. PA-RISC 1.0 32-bit, implemented in several early processors and used in the very first PA-RISC servers in the 1980s, without MMU: NS-1, NS-2 and PCX, plus the TTL TS-1 and possible CS-1.
  2. PA-RISC 1.1 32-bit, used in HP 9000 servers and workstations from the late-1980s and 1990s: the first PA-7000 and PA-7100 and the later integrated low-cost PA-7100LC and PA-7300LC.
  3. PA-RISC 2.0 64-bit, extended PA-RISC with a redesign of most parts of the architecture, used in the late-1990s to 2000s in many PA-RISC computers: PA-8000 and PA-8200 (very similar) and the modified iterations PA-8500, PA-8600 and PA-8700 with large on-chip caches. PA-8800 and PA-8900 are dual-core chips, with the last PA-9000 never implemented.

The following PA-RISC processors have been developed and used by HP throughout the years.

HP PA-RISC processors overview
CPU ISA Release Clock
max
Cache
max
Bus Super
scalar
SMP Units
TS-1 PA 1.0
32-bit
1986 8MHz 128KB Custom 1-way 1 Integer
1 external FPU
NS-1 PA 1.0
32-bit
1987 30MHz 128KB SMB 1-way 1 Integer
1 external FPU
NS-2 PA 1.0
32-bit
1989 27.5MHz 1MB SMB 1-way Yes 1 Integer
1 external FPU
PCX PA 1.0
32-bit
1990 50MHz 1MB SMB 1-way Yes 1 Integer
1 external FPU
PA-7000 PA 1.1a
32-bit
1991 66MHz 512KB PBus/VSC 1-way 1 Integer
1 external FPU
PA-7100
PA-7150
PA 1.1b
32-bit
1992 125MHz 3MB PBus/VSC 2-way Yes 1 Integer
1 Floating Point
PA-7100LC PA 1.1c
32-bit
1994 100MHz 1KB
2MB L2
GSC 2-way 2 Integer
1 Floating Point
MAX-1
PA-7200 PA 1.1d
32-bit
1995 140MHz 2KB
3MB L2
Runway 2-way Yes 2 Integer
1 Floating Point
PA-7300LC PA 1.1e
32-bit
1996 180MHz 128KB
8MB L2
GSC 2-way 2 Integer
1 Floating Point
MAX-1
PA-8000 PA 2.0
64-bit
1996 230MHz 2MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8200 PA 2.0
64-bit
1997 300MHz 4MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8500 PA 2.0
64-bit
1998 440MHz 1.5MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8600 PA 2.0
64-bit
2000 550MHz 1.5MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8700 PA 2.0
64-bit
2001 875MHz 2.25MB Runway 4-way Yes 4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8800
dual-core
PA 2.0
64-bit
2004 1GHz 2×1.5MB
32MB L2
Itanium 2 2×4-way Yes 2 cores, each:
4 Integer
4 Floating Point
2 Load/Store
MAX-2
PA-8900
dual-core
PA 2.0
64-bit
2005 1.1GHz 2×1.5MB
64MB L2
Itanium 2 2×4-way Yes 2 cores, each:
4 Integer
4 Floating Point
2 Load/Store
MAX-2

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