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Early PA-RISC Systems

HP PA-RISC early computer models
Model CPU Group
808 PCX Low-cost servers
815 PCX Low-cost servers
822 NS-2 Low-cost servers
825 NS-1 NMOS minicomputers
832 NS-2 Low-cost servers
835 NS-1 NMOS minicomputers
840 TS-1 First PA-RISC server
842 PCX CMOS servers
845 NS-2 NMOS minicomputers
850 NS-1 NMOS minicomputers
852 PCX CMOS servers
855 NS-2 NMOS minicomputers
860 NS-2 NMOS minicomputers
870 PCX CMOS servers

Overview

The first PA-RISC systems were released in the 1980s in the HP 9000/800 Series, which were all server systems, although some had graphics capabilities. Both the technical and marketing landscape was changing in the 1980s, as HP had many other server and microcomputer series that it was selling. RISC and Unix servers were both new and rather a niche.

First PA-RISC server

The first commercial PA-RISC product appeared in 1986 with the HP 9000/840 Indigo computer, based on a six-board TTL implementation of the 32-bit PA-RISC 1.0 architecture, TS-1, running at 8 MHz. The TTL boards measure 8.4×11.3″, SRAMs/PALs and about 150 ICs each. The TS-1 boards implement the processor pipeline, a 4096-entry TLB and 128  KB L1 cache, divided into 64  KB for each data and instruction.2

Two main buses are used in the I/O system: Central Bus CTB, also called MidBus, connects the processor to the main memory and the secondary I/O bus. CTB is 32-bit wide and has a clock speed of 8 MHz, with a sustained transfer rate of 20 MB/s. Seven slots for general purpose I/O cards are available. Channel I/O CIO is the central device I/O bus, with up to three CIO channels (CIB) in a single 9000/840 computer. CIO/CIB is 16-bit wide and achieves a transfer rate of 5 MB/s with a clock speed of 4 MHz, with seven shared I/O slots. Supported devices on CIO include HP-IB, the Hewlett-Packard Interface-Bus, used for instrumentation, measurement and networking adapters.

Up to 112 MB of RAM was supported: 7×16 MB with 2-16 MB memory modules compatible. The optional graphics adapter used one I/O and one memory slot, reducing the maximum RAM to 96 MB. Included by default into the system was a separate Floating Point Coprocessor (FPC) board. The 840 could be upgraded via a CPU board swap to 825, 835 or 845s retaining the case and memory and I/O boards.

The HP 9000/840 achieved about 4.5 MIPS and ran HP-UX version 1.0 (heavily BSD-based) until version 10.01, the pre-Y2k release. Storage and media devices were attached to HP-IB, SCSI was available only later and with newer boot ROMs.

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NMOS minicomputers

NS-1 processor

Between 1987 and 1988 first systems with 32-bit PA-RISC 1.0 processors implemented in NMOS-III NS-1 were released:3 The HP 9000/825S minicomputer, 825SRX Superworkstation, 835 and 850S Super-minicomputer.

These systems used three main buses, expanding the original 9000/840 architecture:4 The 64-bit wide System Main Bus SMB connects the CPU, main memory and I/O over CTBs with a throughput of 100 MB/s. Two CTBs/Midbuses attach via two bus converters to the SMB, while the I/O devices attach via CIO/CIBs to the two CTBs.

The HP 9000/825 or 825S FireFox were slightly smaller servers or minicomputers, also sold as 825SRX Superworkstation, based on the 25 MHz NS-1 processor on two boards, with 16 KB cache and 2048-entry TLB. Their central CTB buses run at 8.33 MHz with seven shared I/O CIO and memory slots. Maximum RAM was 112 MB or 96 MB with graphics adapter, which could be expanded with 16MB arrays. The 825 sold for a price of about US $42,500 in 1987, with a performance of about 9 MIPS. It was also sold with graphics hardware as 825CHX, which included a 2D adapter and 825SRX with up to 24-bit 3D graphics.

The HP 9000/835 or 835S TopGun were slighly bigger servers with the 30 MHz NS-1 processor (maybe also NS-2 processor), with 128 KB cache and >4096-entry TLB. Their central CTB buses run at 10 MHz, their maximum, with seven shared I/O CIO and memory slots. Maximum RAM was 112 MB or 96 MB with graphics adapter, which could be expanded with 16MB arrays. The 835 were slightly more expensive, and sold for about US $45,000 in 1988 for a prformance of about 14 MIPS. Similar to other 800s, the 835 were also sold with graphics hardware as 835CHX with 2D adapter or 835SRX with up to 24-bit 3D. Special models were the 9000/834, a standard 835 with a two-user limit and 9000/835SE, a high-end version with integrated CIO expander. Server versions without graphics were shortly sold as 9000/635SV.

A port of early PA-RISC HPBSD ran on 834 and 835, as did an unreleased Mach 3.0 port from the University of Utah The Chorus operating system was ported in 1990-1991 to the 834 with v 3.3 nucleus kernel and v3.2 MiX operating system personality on top.

The HP 9000/850 or 850S Cheetah were bigger cabinet servers with a 27.5 MHz NS-1 processor with 128 KB cache combined I/D and 4096-entry TLB. Their CTBs run at 9.16 MHz, with CIO I/O buses. The 850 additionally had two Memory Array Buses MAB, capable of linking up eight 16 MB memory modules arrays via a 72-bit data path to the SMB. Maximum RAM was 128 MB with one memory controller and 256 MB with two memory controllers. Sold for a price of about US $200,000 in 1987 with a performance of about 14 MIPS.

NS-2 processor

Later, in 1989, similar computers based on the NS-2, a revamped NS-1, appeared from early 1989 till late 1990. These systems are all based on the same I/O architecture and CIO devices and faciliate the same CPU design — the PA-RISC 1.0 NS-2 processor. These PA-RISC 1.0 and CIO servers include the following:5

The HP 9000/845 ShoGun from 1989 had a 27.5 MHz NS-2 processor (not sure, could also be based on a NS-1) with 256 KB cache and a 16384-entry TLB. The CTB main buses run at 9.16 MHz for seven shared I/O CIO and memory slots. Maximum RAM of 112 MB: 7×16 MB, 96 MB: 6×16 MB with graphics adapter Performance was about 22 MIPS. Server versions without graphics were shortly sold as 9000/645SV.

The HP 9000/855 or 855S Jaguar were slighly bigger servers with a 27.5 MHz NS-2 processor with 256 KB cache and a 16384-entry TLB. CTBs run at 9.16 MHz, maximum RAM is 128 MB with one and 256 MB with two memory controllers. Performance was about 22 MIPS for a price of roughly US $300,000 (!) in 1990.

The HP 9000/860 or 860S Cougar servers were also cabinet, mainframe-like systems with a 27.5 MHz NS-2 processor with 1024 KB cache and a 16384-entry TLB. CTBs run at 9.16 MHz, maximum RAM is 128 MB with one and 256 MB with two memory controllers. The 860 could be upgraded with newer CPU boards to a 865 or 870 server.

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Low-cost servers

Lower-end and more compact servers were introduced between 1989 and 1990, based on the NS-2 processor and PCX processor using the HP-PB I/O bus.7

The HP 9000/822 SilverFox Low was the entry model with a 25 MHz NS-2 processor with 32 KB cache and a 4096-entry TLB. Maximum RAM was 128 MB or 64 MB. Performance was about 10 MIPS for a price of around $20,000 in 1989.

The HP 9000/832 SilverFox High was very similar to the 822 but had slighly higher performance with a faster 30 MHz NS-2 processor with 128 KB cache and a 4096-entry TLB. Maximum RAM was either 128 MB or 64 MB. Performance was 15 MIPS for a price of about US $30,000 in 1989.

The HP 9000/808 and 815 used the same PCX processor and similar system design, with a performance of 7 MIPS. Maximum RAM for the 808 was 32 MB, for the 815 it was 56 MB. The latter was sold in 1990 for around $14,900.

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CMOS servers

The HP 9000/842, 9000/852, 9000/865 and the multi-processor 9000/870 include the first PA-RISC processors implemented in CMOS — the PA-RISC 1.0 PCX. These systems are very similar to the NS-2 based servers, with the 860 being board-upgradeable to a 865 or 870, and feature the same principal system and I/O architecture with a slightly modified CPU/SPU design.6 These system use the same 16 MB memory arrays as earlier servers but could also use 64 MB boards.

The HP 9000/842 SilverBullet Low used a 32 MHz PCX processor with 1024 KB cache and a 8192-entry TLB. Performance was about 30 MIPS for a price of about $85,000 at time of introduction in 1990. The HP 9000/852 SilverBullet High was almost the same design, but with a faster 50 MHz PCX processor for a performance of about 50 MIPS. It also cost more, around $143,000.

The HP 9000/865 Panther server was again a bigger design with a fast 50 MHz PCX processor with 768 KB cache and a 8192-entry TLB. For I/O the CIO bus was used, maximum RAM was 512 MB. It was sold for about $275,000 first released in 1991.

HP 9000/870 or 870s Panther was similarly named and the first SMP multiprocessor PA-RISC system with up to four 50 MHz PCX processors with 1024 KB cache and a 8192-entry TLB each. The 870/100 was uni-, 870/200 dual-, 870/300 triple- and 870/400 quad-CPU. The CIO bus was again used for I/O, and maximum RAM was 1024 MB with two memory controllers in 16 slots. Performance was about 50 MIPS for single-CPU and 90 MIPS for dual-CPU, for a price of about $440,000 for 870/300, $530,000 for 870/400.

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Benchmarks

Assorted MIPS performance figures for some systems.

Model MIPS
840 4.5
825 9
822 10
850 14
835 14
832 15
845 22
855 22
842 30
852 50
870/100
single
50
870/200
dual
90

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References

Information on these early PA-RISC computers is fragmented and inconsistent. This includes official sales and technical documentation, with sometimes divergent accounts of hardware and architecture, plus divergent information on used PA-RISC processors. Much of the information here was pieced together from old news articles and press releases, plus documentation available at the HP Computer Museum.

  1. INFORMATION ON HP9000 SERVERS AND WORKSTATIONS Hewlett Packard Company (1999. Accessed January 2007) and The HP 3000/HP 9000 model spreadsheet (Excel spreadsheet) Allegro Consultants (2004. Accessed January 2007)
  2. Wayne E. Holt (ed.), Beyond RISC! An Essential Guide to Hewlett-Packard Precision Architecture, p. 95-102. (January 1988: Software Research Northwest Inc.) and Hardware Design of the First HP Precision Architecture Computers (PDF) David A. Fotland et al (March 1987: Hewlett-Packard Journal)
  3. HP 3000 Series 950 and HP 9000 Model 850S Family CE Handbook (PDF) Hewlett-Packard Company (October 1990. Accessed January 2008 at hpmuseum.net) and HP 9000 Series 800 Model 825S Hardware Technical Data (PDF) Hewlett-Packard Company (September 1988. Accessed January 2008 at hpmuseum.net) and HP 3000/925 and HP 9000/825/835 Computer Systems CE Handbook (PDF) Hewlett-Packard Company (May 1988. Accessed January 2008 at hpmuseum.net) and New midrange members of the Hewlett-Packard Precision Architecture Computer Family Thomas O. Meyer et al (June 1989: Hewlett Packard Journal. Accessed January 2008 at findarticles.com)
  4. Wayne E. Holt, Beyond RISC!
  5. Hewlett-Packard Company, HP 3000 Series 950 and HP 9000 Model 850S Family CE Handbook
  6. Ibid.
  7. HP 9000 Series 800 Model 822S/832S Technical Data (PDF) Hewlett-Packard Company (1989. Accessed January 2008 at hpmuseum.net)
  8. For HP 9000/840: Interview with David Fotland, September/October 2008

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